This happens more often than you'd think. Intel (and later, AMD) added AES primitives to their instruction set to speed up encryption. VT-x (and the AMD equivalent) were both designed to improve the performance of virtualization. Outside of the realm of CPUs, the use of FPGAs -> ASICs for accelerating bitcoin hashing certainly wouldn't have existed if not for the software. Hardware support for CUDA / OpenCL accelerated existing parallel workloads.
> This is a better approach, as it's easier to experiment with language design than it is with hardware design.
FPGAs certainly lower the barrier to experimenting with hardware design, although yes, it's probably still higher than language modifications.
This happens more often than you'd think. Intel (and later, AMD) added AES primitives to their instruction set to speed up encryption. VT-x (and the AMD equivalent) were both designed to improve the performance of virtualization. Outside of the realm of CPUs, the use of FPGAs -> ASICs for accelerating bitcoin hashing certainly wouldn't have existed if not for the software. Hardware support for CUDA / OpenCL accelerated existing parallel workloads.
> This is a better approach, as it's easier to experiment with language design than it is with hardware design.
FPGAs certainly lower the barrier to experimenting with hardware design, although yes, it's probably still higher than language modifications.